Bulletin: Functional safety on chips out loud podcast

Micron Technology | June 2022

I had the privilege of being able to share the stage and podcast with Marco Montagnana, our senior. manager of the FUSA and Cybersecurity Office and Jim Greene, our director of Technology Marketing for an enlightening conversation.

Our discussion was centered around our multi-year journey where Micron became fluent in memory solutions functional safety, investing in a functional safety office and then, as the fruit of our efforts - the introduction of the industry’s first ASIL-D compliant LPDDR5 as certified by exida, an industry leader in functional safety.

What is clear from our discussion is that Micron views DRAM as significantly more complex than some other industry players, and the investment in delivering the industry’s first and only ASIL-D certified part represents a very significant, company-wide effort. Systematic fault coverage (basically best-in-class design, verification, and test methodologies) has been embraced across the company to ensure we are delivering a product that meets stringent automotive standards.

What was also clear during our discussion is that memory at the ASIL-D level will be key in achieving the self-driving car. To put things in perspective, achieving ASIL-D at the system level implies that 10 failures will be allowed in 114,000 years (1 in 109 hours). This data point would suggest that the vehicle would be in operation 24 hours a day and seven days a week – which is very far from the typical use model – about 10,000 or so hours. The problem becomes even more complex when you realize that the FIT (failure in time) budget for DRAM is typically allocated by the system designer for 10% or so of the total FIT rate of the system. This is non-trivial to achieve, but an important specification.

For more than 30 years, Micron has demonstrated an unwavering commitment to lead the automotive industry in delivering industry-leading solutions. Please join me in listening to this very engaging podcast that breaks down safety into its component parts and outlines the solutions that Micron is delivering to address both random fault coverage and systematic fault coverage. Micron’s JEDEC compliant ASIL-D certified LPDDR5 provides random fault coverage features that can eliminate approaches that are based on in-line ECC or redundant solutions. This leads to huge power, cost and performance benefits. If you can find the time to listen to this podcast, I can guarantee you won’t be disappointed.